'C/LC206 DSPs hit power, price point for embedded apps

Featuring one of the best price-to-performance ratios in the industry, TI’s new TMS320C206 and TMS320LC206 DSPs are designed to address the specific needs of high-volume, embedded systems applications.

These devices are priced at sub-US $8.00 each in quantities of 100K units or greater. Production quantities are planned for 3Q98.

With up to 40 MIPS and a rich peripheral set, the ’C/’LC206 devices pro-vide substantially more processing power than traditional 16- and 32-bit microcontrollers, while retaining an easy-to-use development environment and system flexibility. These highly-integrated, single-chip solutions deliver cost savings at both the device and system level by enabling developers to potentially replace multiple microcontrollers or other less powerful CPUs.

’C2xLP core advantage

The basis for the ’C/’LC206’s power/price advantage is TI’s ’C2xLP core. The 16-bit core incorporates a static design and is manufactured in a submicron, triple-level-metal, full-complementary CMOS process for high-per-formance, low-power operation. The core was first available as a CPU option in TI’s customizable DSP (cDSP™) design methodology, and is designed to be combined with various complementary functions and to support a wide range of applications.

Features

The ’C/’LC206 devices are available in both 5 V and 3.3 V, with built-in power-management functions featuring idle low-power modes. Both chips carry 4.5K words of RAM and 32K words of ROM on-chip, eliminating the need for off-chip functionality.

The new DSPs are pin-to-pin compatible with TI’s ’F206, the industry’s first DSP to offer on-chip Flash memory. This feature provides manufacturers an added price-saving mechanism for better and more cost-competitive applications. The ’F206, with 32K words of Flash, enables a designer to store the program on-chip, without needing to draw from external memory. In-system reprogrammability provides an easy way to adapt to changing standards and greatly reduces the time in developing the product prototype.

Device selection chart: ’F/’C/’LC206 DSPs ’F206

Specs 'F206 'C206 'LC206

Cycle time (ns) 50 25 25

Operating voltage (V_DD) 5 V 3.3-V core,
5-V I/O 3.3 V

On-chip memory: RAM
ROM
Flash 4.5 K
—
32 K 4.5 K
32 K
— 4.5 K
32 K
—

Off-chip memory 192 K 192 K 192 K

Serial ports: Sync
Async 1
1 1
1 1
1

I/O: Parallel
DMA 64Kx16
Ext. 64Kx16
Ext. 64Kx16
Ext.

Timers 1 1 1

Package 100 TQFP 100 TQFP 100 TQFP

Peripherals

TI’s new DSPs come with a wide mix of peripherals, including phase-locked loop, enhanced synchronous serial port (ESSP), universal asynchronous receive transmit, on-chip timers, and low-power mode options.

The new ESSP provides a glueless interface for up to four external, low-cost codecs for multichannel communication applications. The ESSP is also configurable to support some SPI interfaces, virtually eliminating the need for more expensive codecs found in less optimized solutions. Complementary TI devices include the TLV320AC36 voice-band audio processor, the TCM29C1x and TCM37C1x codec/filter line-card combos, and the TLC320AD5x analog interface circuits for modems.

Easy-to-use development tools

To help get designers to market quickly, TI and its third-party support companies offer ’C2000 development tools, including hardware emulators, simulators, C compilers, and assembler/linkers. Both provide designers ’C2000-based concept-to-production Evaluation Modules (EVMs) and entry-level DSP Starter Kits (DSKs) for the appropriate level of support.

For products like digital still cameras, feature phones, low bit-rate modems, point-of-sale terminals, magnetic card readers, and other consumer and business applications that operate in an environment of steadily-falling margins, TI’s advanced ’C/’LC206 DSPs offer a solution to maintaining competitive pricing while supporting growing needs for power.