InsideShowcase (Volume 27) is available in HTML and PDF format. - 179KBPowerFLEX™, a low-cost alternative to TO-220 High performance PLL clock drivers Digital control loop for 3-phase brushless dc motor Cost-effective gigabit ethernet transceiver SN75LVDM976, industry's first discrete dual mode LVDS SCSI transceiver TRF2050, a 1.2 GHz fractional-N/integrator-N syntheszier New external memory interface provides 8 hour speech duration |
New external memory interface provides 8 hr. speech durationProduct Features
Key Applications:
 The MSP50C30 long duration speech processor features the same 8-bit microprocessor and dual synthesis channels found in the other MSP50C3X devices, with a 4K internal ROM, 1024 RAM locations, and 28 software-configurable I/O pins. This device contains 23 address and 8 data lines which allow a direct interface to external ROM (up to 8 Mbytes). With the external memory interface, the MSP50C30 is capable of long duration speech synthesis of up to 8 hours of LPC (Linear Predictive Coding). The 28 I/O pins are configurable under software control to be either inputs or outputs. As inputs, they can be configured to be either high impedance or with a passive pull-up resistor. As outputs, they can be configured to be either totem pole or open drain. A special wake-up feature allows the device to be placed in a low power 'sleep' mode from which it will wake up upon a transition on any of 8 software definable pins. A number of low bit-rate speech synthesis algorithms such as LPC, MELP (Mixed Excitation Linear Prediction), and CELP (Code Excited Linear Prediction) are available for use with the MSP50C30. These options provide great flexibility in the use of data space as well as the quality of the speech. Other options available for use with this device are ADPCM and FM Synthesis. A number of mask options are available on the MSP50C30. These include DAC output options (two-pin digital or one-pin analog), a choice of an internal or external clock, and package type (die or 100-pin QFP). Development tools available for supporting the MSP50C30 include an emulator and an assembler which are used in the code development process. These tools allow the user to compile, set breakpoints, single step through code, and examine/modify registers and memory in order to debug their code. The following table lists the complete MSP50C3X family and the features for each device. To order your free copy of the: Vol 27 May, 1998 |
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| ROM Type |
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| ROM (bytes) |
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| # of RAM locations |
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| I/O Pins (packaged) |
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| I/O Pins (die) |
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| A/D Input |
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| Linear Amp |
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| Pin Count (packaged) |
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| Pin Count (die) |
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