68HC08 CPU and Peripheral Overview

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68HC08 Central Processor Unit (CPU08)

  • Fully upward object code compatible with the 68HC05 Family for easy migration
  • 8 MHz bus speed at 5 V yields 125 ns minimum instruction cycle
  • 4 MHz bus speed at 3 V
  • 16-bit stack pointer with new stack manipulation instructions
  • 16-bit index register with index register instructions
  • 78 new instructions
  • Memory to memory moves without using the accumulator
  • Faster 8-bit multiply and new integer/fractional divide instruction
  • Advanced looping control
  • Enhanced binary coded decimal (BCD) instructions
  • 16 addressing modes including stack relative
  • 64 Kbyte program/data memory space
  • Opcode look ahead results in an average cycle count reduction of 20%-30%
  • Fully static low-voltage/low-power design

    • Timer Interface Module (TIM)
    The TIM offers flexible configurations to service a variety of timing applications. Readers familiar with the 68HC05 16-bit timer modules will discover that this TIM provides all the same features (input capture, output compare, interrupt on overflow) with additional functions, including:

  • Each independent timer channel is programmable as output compare, input capture, or unbuffered PWM in any combination
  • Available in 2-channel, 4-channel, and 6-channel versions
  • Multiple TIM modules can be combined for any number of programmable timer channels desired
  • Pairs of timer channels may be linked to generate buffered PWMs
  • More timer-counter control, with stop and reset commands
  • Prescaler rate selection, including external clock select
  • 16-bit counter may be free-running or modulo
  • An overflow can toggle any timer pin
  • Input captures may trigger on both edges
  • Output compares may toggle the output pin
  • Each interrupt has its own vector

    • Serial Communications
    The 68HC08 Family includes devices with asynchronous serial communications modules (SCI), synchronous serial peripheral communications modules (SPI), Controller Area Network (CAN) modules, and SAE J1850 byte data link control modules.


    Serial Peripheral Interface (SPI)
    The SPI communicates synchronously over short distances (usually on a single PCB) at high speed. The SPI allows the microcontroller to communicate with peripheral devices such as a simple shift register, a serial EEPROM, or a complete LCD or ADC subsystem.

  • Full-duplex, three-wire synchronous transfers
  • Master or slave operation
  • Maximum master bit frequency is bus frequency divided by 2
  • Maximum bit rate of 4 MHz for an 8 MHz system clock
  • Maximum slave bit frequency is bus frequency
  • Maximum bit rate of 8 MHz for an 8 MHz system clock
  • Four programmable master bit rates
  • Programmable clock polarity and phase
  • End of transmission interrupt flag
  • Programmable wired-OR mode
  • Transmit and receive buffering

    • Serial Communications Interface (SCI)
    The SCI is a serial UART-type asynchronous communications system. The SCI can be used for communications between the microcontroller and a terminal, a computer, or in a network of microcontrollers. A typical SCI application is long-distance communications (RS-232).

  • Standard mark/space non-return-to-zero format
  • Full-duplex operation
  • Double buffering of both transmitter and receiver
  • Separately enabled transmitter and receiver
  • Programmable 8-bit or 9-bit character length
  • Advanced error detection at 1/16 of a bit time
  • Baud rate generator with 32 programmable baud rates
  • Idle line and address mark wakeup methods
  • Receiver framing error detection
  • Break send capability
  • Optional hardware parity checking and generation
  • Separate transmitter, receiver, and error interrupt vectors

    • SAE J1850 Byte Data Link Control Module (BDLC-D)
    The BDLC-D is an advanced serial communication multiplex bus controller operating according to the SAE J1850 Class B protocol. Typical applications of the BDLC module are in automobiles where multiple BDLC MCUs can communicate over a single or dual wire bus, eliminating the weight and bulk of wire harnesses and adding diagnostic capability.

  • SAE J1850 compatible
  • 10.4 kbps variable pulse width (VPW) bit format
  • Digital noise filter
  • Collision detection
  • Hardware cyclical redundancy check (CRC) generation and checking
  • Two power-saving modes with automatic wakeup on network activity
  • Polling and CPU interrupts available
  • Receive and transmit block mode supported
  • Supports 4x receive mode (41.6 kbps)
  • Digital loopback mode
  • Analog loopback mode
  • Supports in-frame response (IFR) types 0, 1, 2, and 3

    • Motorola Scalable CAN Module (MSCAN)
    The Controller Area Network, or CAN, protocol is a serial communication protocol originally developed by Robert Bosch GmbH for use in serial communication networks in vehicles. Several major auto manufacturers are either currently using CAN networks in their vehicles or are developing them for future vehicles. In addition, CAN is becoming very popular for use in factory-floor automation-type industrial networks.

    The Motorola Scalable CAN module (MSCAN) is an advanced communications controller implementing the CAN protocol with these features:

  • Implementation of CAN version 2 parts A and B
  • Standard (11-bit) and extended (29-bit) data frames
  • 0 to 8 bytes data length
  • Programmable bit rate up to 1 Mbps
  • Support for remote frames
  • Double buffered receive
  • Triple buffered transmit with internal prioritization using a "local priority" concept
  • Flexible maskable identifier filter supports alternatively one full size extended identifier filter, two 16-bit filters, or four 8-bit filters
  • Programmable wakeup functionality with integrated low-pass filter
  • Programmable loopback mode supports self-test
  • Separate signaling and interrupt capabilities for all CAN receiver and transmitter error states (warning, error passive, bus-off)
  • Programmable MSCAN clock source (either the CPU bus clock or the crystal oscillator output)
  • Programmable link to on-chip timer interface module (TIM) for time stamping and network synchronization
  • Low-power sleep mode

    • Clock Generation Module with PLL (CGM)
    The CGM includes a crystal oscillator circuit, a phased-lock loop (PLL) with output frequencies programmable in integer multiples of the external crystal reference, and a base clock selector circuit. The 68HC08 can use either a 32 KHz optimized version or a 4 MHz optimized version. Both versions allow the use of lower cost crystals and reduce generated noise while still providing high performance (up to 32 MHz internal clocks).


    Analog-to-Digital Converter (ADC)
    The ADC periodically samples external analog signals and produces corresponding digital values. Typical applications are measuring analog inputs like battery voltage, temperature, pressure, and fluid levels.

  • Linear successive approximation
  • 8-bit resolution (10-bit version in development)
  • Single or continuous conversion
  • Conversion complete flag or conversion complete interrupt
  • Selectable ADC clock
  • Conversion time of 17 microseconds
  • Analog multiplexer allows variable number of channels with a single ADC

    • Low Voltage Inhibit (LVI)
    The LVI module monitors supply voltage VDD. When the voltage has dropped to the device specific trip point, a flag is set allowing software to periodically poll for low battery. Optionally, the user can enable an automatic reset of the MCU when voltage drops below VTRIP. Once VDD has been restored above the trip point, the reset state will continue for 4095 internal bus cycles to allow stabilization of the oscillator, then normal processing continues. Some 68HC08 modules are unique in that they incorporate multiple trip points, allowing the devices to be used in both low voltage and standard voltage applications.


    FLASH EEPROM Memory
    Some derivatives of the 68HC08 Family feature on-chip non-volatile FLASH EEPROM memory that is bulk erasable. This innovative memory subsystem offers many benefits, including:

  • In-circuit programming
  • Field re-programmability
  • Fast programming and erase times
  • Faster time to market
  • Production units that can be customized at end of process
  • Programming with only VDD supply

    • Byte-Erasable EEPROM Memory
    Some derivatives of the 68HC08 Family also feature on-chip byte-erasable EEPROM for enhanced programming flexibility. This integrated non-volatile memory solution enables:

  • Storage of calibration information
  • Self-adjusting or self-adapting systems
  • Data logging for historical or secure data
  • Executable for jump tables/code patches



    • 68HC08 Product Overview

    68HC08 AS Family:
    The AS Family incorporates an advanced serial communication multiplex bus controller operating according to the SAE J1850 Class B protocol. Typical applications of the BDLC module are in automobiles where multiple BDLC MCUs can communicate over a single or dual wire bus, eliminating the weight and bulk of wire harnesses and adding diagnostic capability.

    68HC08 AZ Family:
    The AZ Family contains integrated Controller Area Network multiplex interfaces that allow them to communicate over a CAN network. The CAN protocol is popular in factory-floor automation-type industrial networks and in automotive networks.

    68HC08 GP Family:
    This family is suitable for a wide range of general-purpose applications where in-system programmable FLASH memory, ADC, asynchronous and synchronous serial ports, a 32 KHz PLL, and enhanced timers with PWMs are required. The GP Family provides system cost reduction through integration of high current I/O, low-voltage inhibit with selectable trip points, programmable pullups and keyboard interrupts.

    68HC08 JL and JK Families:
    The JL and JK Families brings the higher performing 68HC08 Family to cost sensitive general-purpose applications. The JL and JK Families integrate an A/D converter with either 4 Kbytes or 1.5 Kbytes of FLASH and the same system cost integration as the GP Family. The JK Family is offered in 20-pin packages while the JL Family is offered in 28-pin packages.

    68HC08 MP and MR Families:
    These families incorporate an advanced 6-channel, 12-bit PWM subsystem combined with ADC and serial communication that are ideal for 3-phase motor control applications.



    68HC08 Development Tools

    Real-time In-Circuit Development Kits
    With Motorola's modular approach, you get real-time, in-circuit emulation in either of two versions: the high-performance Motorola Modular Development System (MMDS) or the economical Motorola Modular Evaluation System (MMEVS). The MMEVS is a two-board system which, when connected to your target system, acts just as the actual target device would. The MMDS offers even more features than the MMEVS - with powerful, advanced debugging tools, including an integrated bus state analyzer and a dual-port RAM memory window.

    Economical Integrated Development Kits
    Motorola's M68ICS08GP In-Circuit Simulator (ICS) Kit is our lowest cost tool for developing and debugging target systems incorporating the 68HC908GP20/32 microcontrollers. It provides an innovative interface to a user's target system for Windows®-based editing, assembly, software simulation, programming, and in-circuit simulation. Real-time in-circuit debug is provided through the 68HC08's MON08 serial interface. Real-time In-Circuit Emulation is also provided using MON08 with the exception of clock control and communication. Everything a designer needs to develop and debug products is included in the ICS kit, including samples, documentation, application notes, and cables.