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Direct Memory Access
The Direct Memory Access (DMA) module is a co-processor that can transfer data between any two CPU-addressable locations without CPU intervention. Since I/O registers are memory-mapped, the DMA can read from or write to peripherals (such as SCI, SPI, or Timer) in two to four bus cycles - a vast improvement over the minimum 16 bus cycles needed for a traditional CPU interrupt routine.
Additional features of the DMA include up to seven independent channels, up to 8 transfer sources, byte or word transfer capability, block or loop transfers, programmable bus bandwidth, CPU interrupt capability on transfer completion, and memory stretch capability for addresses beyond the 64 Kbyte internal memory map.
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