TI expands the industry’s lowest power DSP platform

Two new power-efficient, ultra small DSPs from TI will help drive development of the next generation of cellular telephones, hand-held computers, personal digital assistants (PDAs) and dozens of other portable and telecommunications products.

Both the TMS320C5402 and TMS320C5420 set low power consumption standards with the ’C5420 offering 200 MIPS and the ’C5402 delivering the industry’s lowest-cost solution at $5.00 per 100 MIPS (in quantities of 50K).

The ’C5420 packs two DSP cores, 200 MIPS, 200K words of on-chip SRAM memory, and a complement of peripherals including six multi-channel buffered serial ports (McBSPs), a direct memory access (DMA) controller, and a 16-bit host port interface (HPI). Even with all this functionality, the device consumes less than 160 mW at 200 MIPS, giving it the lowest power consumption figure in the industry. The ’C5420 is the most highly-integrated, fixed-point DSP available today, answering the high-performance, low-power-consumption and small-space needs of high-end, multi-channel infrastructure equipment like base stations, remote access servers (RAS), modems, and telephony systems.

The new ’C5402, at $5 per 100 MIPS, provides the industry’s most cost-effective, general-purpose solution for single-channel, end-user terminal systems like wireless modems, next-generation PDAs, Ethernet phones and other telephony applications. The 100-MIPS device features 16K words of on-chip SRAM, 4K words of ROM, and intelligent peripheral capabilities including two McBSPs, a bit I/O interface, a DMA controller, and an independent HPI.

Both devices are supported by a comprehensive selection of development tools. Designers who migrate from TI’s ’C5x generation to ’C54x DSPs can download a free software code translation system from the TI web site, along with free ’C5000 evaluation tools for a 30-day trial period.

The lowest power consumption in the industry

The ’C5402 and ’C5420 continue the established ’C54x generation record of having the lowest power dissipation in the industry. The architecture was designed to allow modules of the device to automatically shut down when not in use. Also, the highly-efficient, parallel instruction set enables several operations to be executed concurrently. Another major contributor to the low power consumption of the ’C5402 and ’C5420 is the high degree of integration, in part made possible by process breakthroughs like TI’s TImeline™ technology that conserves power by performing more operations on-chip while minimizing off-chip accesses.

Pricing and availability

’C5420 samples are scheduled for availability in 12/98, with production volumes expected 2Q99. Samples of the ’C5402 are scheduled for 1Q99, with production volumes expected 2Q99. In quantities of 50K, suggested resale pricing for the ’C5402 is US $5 and US $55 for the ’C5420. For more information about these products, please visit

www.ti.com/sc/c54x

TMS320C54x Product Offerings
					On-Chip Memory
					RAM	ROM		Peripherals
Device	Cycle Time (ns)	Nominal Voltage	Peak MIPS	mW	Data/ Program	Data/ Program	Serial Port	McBSP	HPI	DMA Channels	Package Type
’VC5402	10	1.8	100	60	16K	4K	—	2	1	6	144 TQFP/144 BGA
’VC5420	10	1.8	200	160	200K	—	—	6	1	12	144 TQFP/144 BGA
VC = core at 1.8 V and I/O at 3.3 V.