The MC68HC12BE32 microcontroller unit (MCU) is a 16-bit device composed of standard on-chip peripherals including a 16-bit central processing unit (CPU12), 32-Kbyte ROM, 1-Kbyte RAM, 768-byte EEPROM, an asynchronous serial communications interface (SCI), a serial peripheral inter-face (SPI), an 8-channel timer and 16-bit pulse accumulator, an 10-bit analog-to-digital converter (ADC), a four-channel pulse-width modulator (PWM), and a J1850-compatible byte data link communications module (BDLC). System resource mapping, clock generation, interrupt control and bus interfacing are managed by the Lite integration module (LIM). The MC68HC12BE32 has full 16-bit data paths throughout, however, the multiplexed external bus can operate in an 8-bit narrow mode so single 8-bit wide memory can be interfaced for lower cost systems.

• 16-Bit CPU12
• Upward Compatible with M68HC11 Instruction Set
• Interrupt Stacking and Programmer's Model Identical to M68HC11
• 20-Bit ALU
• Instruction Queue
• Enhanced Indexed Addressing
• Fuzzy Logic Instructions
• Multiplexed Bus
  • Single Chip or Expanded
  • 16/16 Wide or 16/8 Narrow Modes
• Memory
  • 32-Kbyte ROM
  • 768-byte EEPROM
  • 1-Kbyte RAM with Single-Cycle Access for Aligned or Misaligned Read/Write
• 8-Channel, 10-Bit Analog-to-Digital Converter
• 8-Channel Timer
  • Each Channel Fully Configurable as Either Input Capture or Output Compare
  • Simple PWM Mode
  • Modulo Reset of Timer Counter
• 16-Bit Pulse Accumulator
  • External Event Counting
  • Gated Time Accumulation
• Pulse-Width Modulator
  • 8-Bit, 4-Channel or 16-Bit, 2-Channel
  • Separate Control for Each Pulse Width and Duty CycleProgrammable Center-Aligned or Left-Aligned Outputs
• Serial Interfaces
  • Asynchronous Serial Communications Interface (SCI)
  • Synchronous Serial Peripheral Interface (SPI)
  • J1850 Byte Data Link Communication (BDLC)
• COP Watchdog Timer, Clock Monitor, and Periodic Interrupt Timer
• 80-Pin QFP Package
  • Up to 63 General-Purpose I/O Lines
  • 2.7V&endash;5.5V Operation at 8 MHz
• Single-Wire Background Debug™ Mode (BDM)
• On-Chip Hardware Breakpoints